The fabrication of semiconductor devices typically includes at least one process step where photoresist is patterned during a lithography process. In general, a lithography process step includes the use of a mask and a light source to expose and pattern an underlying photoresist layer. The photoresist can be either a positive or negative photoresist. After exposure, the exposed (positive photoresist) or unexposed (negative photoresist) portions of the photoresist are removed leaving a patterned layer of photoresist for the next process step. When forming minute patterns for ultra large scale integration (ULSI), a projection and reduction exposure method is typically used. This type of method is particularly useful for ULSI as very small patterns can be resolved because mask precision is also reduced. A lithography process step can be used, for example, to pattern a photoresist layer to serve as an etch mask.
After a lithography process step, it is important for the resulting photoresist pattern to be faithful with respect to the mask that was used. However, when using positive tone photoresist, the resulting pattern generally is thinner or narrower than the mask, and when using negative tone photoresist, the resulting pattern generally is thicker or wider than the mask. Thus, a photoresist deformation value must be estimated and accounted for when the mask is designed. For USLI circuits such as those having sub-half micron features, the relative difference between the resulting photoresist pattern and the mask pattern becomes even greater. For conventional lithography processes, this deformation value can be too large to allow a mask to be constructed for very small scales.